preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 1 of 8 2.1a synchronous current boost dc/dc regulator general description the LP6250 is high efficiency synchronous boost dc/dc converter, fixed frequency, current-mode step-up converter with output to input disconnect. a pwm step-up dc/dc converters optimized to provide a high efficiency solution to medium power system. its pwm circuitry with built-in 2.1a@250m ? power mosfet makes this converter highly power efficiently. selectable high switching frequency allows faster loop response and easy filtering with a low noise output. the non-inverting input its error amplifier is connected to an internal 0.5v precision reference voltage. soft-start time can be programmed with an external capacitor, which sets the input current ra mp rate. current mode control and external compensation network make it easy and flexible to stabilize the system. the devices regulates the output voltage up to 5v from either a 2cell nimh/nicd or a single-cell li-ion battery with a 500khz fixed frequency switching. these features minimize overall solution footprint by allowing the use of tiny, low profile inductors and ceramic capacitors. ordering information LP6250 - f: pb-free package type qv: tdfn-10 marking information please see website. features ? up to 94% efficiency ? shut-down current:<1ua ? output voltage up to 5v ? 500khz fixed frequency switching ? high switch on current:2.1a@250m ? ? available in tdfn-10 package applications ? battery products ? host products ? motor power devices typical application circuit LP6250qvf 6 9 3 10 1 4 2 5 7 batt sw fb gnd en lbo out gnd lbi r2 10k c3 22pf 5v r3 100k r5 on/off r1 90k c1 22uf r5 6.8uh c2 47uf r4 vin lbo pin configurations 3 4 out fb 2 7 5 lbo nc gnd gnd lbi batt 10 9 en gnd 6 1 sw 8 11
preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 2 of 8 functional pin description pin pin name description 1 en regulator on/off control input. a logic high input(ven>1.4v) turns on the regulator. a logic low input(ven<0.4v) puts the LP6250 into low current shutdown mode. 2 out voltage output pin. 3 fb regulation feedback input. connect to an external resistive voltage divider from the output to fb to set the output voltage. 4 lbo open-drain low battery detector output pin. 5,10 gnd power ground. 6 batt battery supply input pin. 7 lbi battery detector input pin. 8 nc no connector. 9 sw output switching node. sw is the drain of the internal n-channel mosfet and rds-on is 250m ? . connect the inductor to sw to complete the step-up converter. 11 epgnd exposed pad. must connect to ground. function block diagram sw
preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 3 of 8 absolute maximum ratings supply input voltage------------------------------------------- --------------------------------------------------------------- -----6v power dissipation, pd @ ta = 25 c tdfn-10--------------------------------------------------------------------------------------------------------600mw lead temperature (soldering, 10 sec.) ------------------------- ---------------------------------------------------------260c storage temperature range ------------------------------------- -------------------------------------------- ?65c to 150c recommended operating conditions supply input voltage------------------------------------------- ------------------------------------------------------ 2.2v to 6v sw pin voltage------------------------------------------------- --------------------------------------------------------------- - 7v en input voltage ---------------------------------------------- ---------------------------------------------------------0v to 5.5v operation junction temperature range -------------------------- ----------------------------------------?40c to 125c operation ambient temperaturerange----------------------------- -----------------------------------------?40c to 85c electrical characteristics parameter conditions LP6250 units min typ. max supply voltage 2.2 5 v output voltage range 2.5 5 v supply current(shutdown) ven=vout=0v,vsw=5v 0.05 1 ua supply current vfb=1.3v 0.2 ma disable supply current en=gnd 0.1 ua feedback voltage 0.5 v feedback input current vfb=1.2v 50 na switching frequency freq 500 khz maximum duty cycle 80 85 90 % low battery detector input 0.5 v en input low voltage 0.4 v en input high voltage 1.4 v mosfet on resistance ron(n-mos) 235 m ? ron(p-mos) 250 m ? mosfet voltage(vds) 14 v nmos current limit 2.1 a soft-start reset switch resistance 100 ? soft-start input source current vss=1.2v 4.0 ua
preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 4 of 8 typical operating characteristics (vdd=3.3v,vout=5v)
preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 5 of 8
preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 6 of 8 operation information output voltage the error amplifier compares a sample of the dc-dc converter output voltage with the 0.5v (vref) reference and generates an error signal for the pwm comparator. output voltage of dc-dc converter is setting with the resistor divider by the following equation: vout=(r1/r2+1) x 0.5v oscillator the switching frequency of LP6250 up to operate at either 500khz. soft start the soft start is functional after power on. the interval of soft start time is determined by a capacitor connected to ss pin. when en pin is taken high, the soft start capacitor (css) is charged by a constant current of 4 a (typ.). during this interval, the ss voltage dire ctly controls the peak inductor current. the maximum load current is available after the soft-start interval is completed. once the en pin is take n low, the soft-start capacitor is discharged to ground to prepare for next start-up. the load must wait for the soft-start interval to finish before drawing a significant amount of load current. the duration after which the load can begin to draw maximum load current is: en the LP6250 can be turn off to reduce the supply current to 0.1 a when en is low. in this mode, the internal reference, error amplifier, comparators, and biasing circuitry turn off while the n-channel mosfet is turned off. the boost converter?s output is connected to vcc by the external inductor and catch diode. output current capability the output current capability of the LP6250 is a function of current limit, input voltage, operation frequency, and inductor value. because of the slope compensation used to stabilize the feedback loop, the duty cycle affects the current limit. the output current capability is governed by the following equation: current limitation the internal power-mos switch current is monitored cycle-by-cycle and is limited to the value not exceed 2.1a (typ.). when the switch current reaches the limited value, the internal power-mos is turned off immediately until the next cycle. low battery detector the LP6250 provides an on-chip comparator with 35mv internal hysteresis fo r low battery detection.if the lbi pin voltage falls below the internal reference voltage(0.5v),the lbo pin(an open-drain output) sinks current to gnd.the lbi pin should be connected to bat pin if the low battery comparator is not used. layout considerations typical for all switching power supplies, the layout is an important step in the design; especially at high peak-currents and switching frequencies. if the layout is not carefully done, the regulator might show noise problem sand duty cycle fitter. the input capacitor should be placed as close as possible to the inpu t pin for good input voltage viltering. the inductor and diode should be placed as close as possible to the switch pin to minimize the noise coupling in to other circuits. sinc e the feedback pin and network is a high impedance circuit the feedback network should be routed away from the inductor. th e feedback pin and feedback network should be shielded with a ground plane or trace to minimize noise coupling into this circuit.
preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 7 of 8 application circuit information lbo LP6250qvf 6 9 3 10 1 4 2 5 7 batt sw fb gnd en lbo out gnd lbi r2 10k figure2. LP6250 application of not used low battery circuit c3 22pf r4 5v r3 100k 5v r5 on/off figure1. LP6250 application circuit of used low battery circuit LP6250qvf 6 9 3 10 1 4 2 5 7 batt sw fb gnd en lbo out gnd lbi c1 47uf r1 90k r5 on/off c3 22pf c1 47uf r5 vin 6.8uh r1 90k c2 47uf r4 6.8uh c2 47uf r3 100k r2 10k vin lbo layout circuit information
preliminary datasheet LP6250 LP6250 C00 version 1.0 datasheet sep.-2010 www.lowpowersemi.com page 8 of 8 packaging information
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